? semiconductor components industries, llc, 2015 november, 2015 ? rev. 5 1 publication order number: esd5b5.0st1/d esd5b5.0s, szesd5b5.0s transient voltage suppressor micro?packaged diode for esd protection the esd5b series is designed to protect voltage sensitive components from esd. excellent clamping capability, low leakage, and fast response time provide best in class protection on designs that are exposed to esd. because of its small size and bi?directional design, it is ideal for use in cellular phones, mp3 players, and portable applications that require audio line protection. specification features ? low capacitance 32 pf ? low clamping voltage ? small body outline dimensions: nom 0.063 x 0.032 (1.6x0.8 mm) ? low body height: nom 0.024 (0.6 mm) ? reverse working (stand?off) voltage: 5.0 v ? peak power up to 50 w @ 8 x 20 s pulse ? low leakage ? response time is typically < 1 ns ? esd rating of class 3 (> 16 kv) per human body model ? iec61000?4?2 level 4 esd protection ? sz prefix for automotive and other applications requiring unique site and control change requirements; aec?q101 qualified and ppap capable ? this is a pb?free device mechanical characteristics case: void-free, transfer-molded, thermosetting plastic epoxy meets ul 94 v?0 lead finish: 100% matte sn (tin) mounting position: any qualified max reflow temperature: 260 c device meets msl 1 requirements maximum ratings rating symbol value unit iec 61000?4?2 (esd) contact air 30 30 kv esd voltage per human body model per machine model 16 400 kv v peak power (figure 1) per 8 x 20 s waveform peak power (figure 2)per 10 x 1000 s waveform p pk 50 10 w total power dissipation on fr?5 board (note 1) @ t a = 25 c p d 200 mw junction and storage temperature range t j , t stg ?55 to +150 c lead solder temperature ? maximum (10 second duration) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. fr?5 = 1.0 x 0.75 x 0.62 in. see application note and8308/d for further description of survivability specs. device package shipping ? ordering information sod?523 case 502 marking diagram www. onsemi.com ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specification s brochure, brd8011/d. www. onsemi.com b5 = specific device code m date code = pb?free package (note: microdot may be in either location) esd5b5.0st1g sod?523 (pb?free) 3000 / tape & reel 1 2 b5 12 m *date code orientation and/or position may vary depending upon manufacturing location. esd5b5.0st5g sod?523 (pb?free) 8000 / tape & reel szesd5b5.0st1g sod?523 (pb?free) 3000 / tape & reel
bi?directional tvs i pp i pp v i i r i t i t i r v rwm v c v br v rwm v c v br esd5b5.0s, szesd5b5.0s www. onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) symbol parameter i pp reverse peak pulse current v c clamping voltage @ i pp v rwm working peak reverse voltage i r reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current *see application note and8308/d for detailed explanations of datasheet parameters. electrical characteristics (t a = 25 c unless otherwise noted, v f = 0.9 v max. @ i f = 10 ma for all types) device* v rwm (v) i r ( a) @ v rwm v br (v) @ i t (note 2) i t c (pf) @ v r = 0 v, f = 1 mhz v c max max min max ma typ per iec61000?4?2 (note 3) esd5b5.0st1g/t5g, szesd5b5.0st1g 5.0 1.0 5.8 7.8 1.0 32 figures 1 and 2 see below *other voltages available upon request. 2. v br is measured with a pulse test current i t at an ambient temperature of 25 c. 3. for test procedure see figures 3 and 4 and application note and8307/d. figure 1. esd clamping voltage screenshot positive 8 kv contact per iec 61000?4?2 figure 2. esd clamping voltage screenshot negative 8 kv contact per iec 61000?4?2
esd5b5.0s, szesd5b5.0s www. onsemi.com 3 iec 61000?4?2 spec. level test volt- age (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000?4?2 w aveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns figure 3. iec61000?4?2 spec figure 4. diagram of esd test setup 50 50 cable tvs oscilloscope esd gun the following is taken from application note and8308/d ? interpretation of datasheet parameters for esd devices. esd voltage clamping for sensitive circuit elements it is important to limit the voltage that an ic will be exposed to during an esd event to as low a voltage as possible. the esd clamping voltage is the voltage drop across the esd protection diode during an esd event per the iec61000?4?2 waveform. since the iec61000?4?2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. on semiconductor has developed a way to examine the entire voltage waveform across the esd protection diode over the time domain of an esd pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all esd protection diodes. for more information on how on semiconductor creates these screenshots and how to interpret them please refer to and8307/d.
esd5b5.0s, szesd5b5.0s www. onsemi.com 4 package dimensions sod?523 case 502 issue e notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish. minimum lead thickness is the minimum thickness of base material. 4. dimensions d and e do not include mold flash, pro- trusions, or gate burrs. e d ?x? ?y? b 2x m 0.08 x y a h c dim min nom max millimeters d 1.10 1.20 1.30 e 0.70 0.80 0.90 a 0.50 0.60 0.70 b 0.25 0.30 0.35 c 0.07 0.14 0.20 l 0.30 ref h 1.50 1.60 1.70 12 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* e e recommended top view side view 2x bottom view l2 l 2x 2x 0.48 0.40 2x 1.80 dimension: millimeters package outline l2 0.15 0.20 0.25 on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 esd5b5.0st1/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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